55134d1ae1
-Upd configure (merge with Hercule configure.in) -upd nullpo.c and atomic.h to allow arm compilation, testedon Epiphany parallela.
154 lines
4.4 KiB
C
154 lines
4.4 KiB
C
// Copyright (c) rAthena Project (www.rathena.org) - Licensed under GNU GPL
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// For more information, see LICENCE in the main folder
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#ifndef _rA_ATOMIC_H_
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#define _rA_ATOMIC_H_
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// Atomic Operations
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// (Interlocked CompareExchange, Add .. and so on ..)
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//
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// Implementation varies / depends on:
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// - Architecture
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// - Compiler
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// - Operating System
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//
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// our Abstraction is fully API-Compatible to Microsofts implementation @ NT5.0+
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//
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#include "../common/cbasetypes.h"
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#if defined(_MSC_VER)
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#include "../common/winapi.h"
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// This checks if C/C++ Compiler Version is 18.00
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#if _MSC_VER < 1800
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#if !defined(_M_X64)
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// When compiling for windows 32bit, the 8byte interlocked operations are not provided by microsoft
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// (because they need at least i586 so its not generic enough.. ... )
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forceinline int64 InterlockedCompareExchange64(volatile int64 *dest, int64 exch, int64 _cmp){
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_asm{
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lea esi,_cmp;
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lea edi,exch;
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mov eax,[esi];
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mov edx,4[esi];
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mov ebx,[edi];
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mov ecx,4[edi];
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mov esi,dest;
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lock CMPXCHG8B [esi];
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}
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}
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forceinline volatile int64 InterlockedIncrement64(volatile int64 *addend){
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__int64 old;
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do{
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old = *addend;
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}while(InterlockedCompareExchange64(addend, (old+1), old) != old);
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return (old + 1);
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}
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forceinline volatile int64 InterlockedDecrement64(volatile int64 *addend){
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__int64 old;
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do{
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old = *addend;
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}while(InterlockedCompareExchange64(addend, (old-1), old) != old);
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return (old - 1);
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}
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forceinline volatile int64 InterlockedExchangeAdd64(volatile int64 *addend, int64 increment){
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__int64 old;
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do{
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old = *addend;
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}while(InterlockedCompareExchange64(addend, (old + increment), old) != old);
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return old;
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}
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forceinline volatile int64 InterlockedExchange64(volatile int64 *target, int64 val){
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__int64 old;
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do{
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old = *target;
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}while(InterlockedCompareExchange64(target, val, old) != old);
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return old;
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}
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#endif //endif 32bit windows
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#endif //endif _msc_ver check
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#elif defined(__GNUC__)
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// The __sync functions are available on x86 or ARMv6+
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//need to proper dig into arm macro,
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//see http://sourceforge.net/p/predef/wiki/Architectures/
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#if !defined(__x86_64__) && !defined(__i386__) \
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&& ( !defined(__ARM_ARCH_VERSION__) || __ARM_ARCH_VERSION__ < 6 ) \
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&& ( !defined(__ARM_ARCH) && __ARM_ARCH < 6 )
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#error Your Target Platfrom is not supported
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#endif
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static forceinline int64 InterlockedExchangeAdd64(volatile int64 *addend, int64 increment){
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return __sync_fetch_and_add(addend, increment);
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}//end: InterlockedExchangeAdd64()
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static forceinline int32 InterlockedExchangeAdd(volatile int32 *addend, int32 increment){
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return __sync_fetch_and_add(addend, increment);
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}//end: InterlockedExchangeAdd()
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static forceinline int64 InterlockedIncrement64(volatile int64 *addend){
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return __sync_add_and_fetch(addend, 1);
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}//end: InterlockedIncrement64()
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static forceinline int32 InterlockedIncrement(volatile int32 *addend){
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return __sync_add_and_fetch(addend, 1);
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}//end: InterlockedIncrement()
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static forceinline int64 InterlockedDecrement64(volatile int64 *addend){
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return __sync_sub_and_fetch(addend, 1);
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}//end: InterlockedDecrement64()
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static forceinline int32 InterlockedDecrement(volatile int32 *addend){
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return __sync_sub_and_fetch(addend, 1);
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}//end: InterlockedDecrement()
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static forceinline int64 InterlockedCompareExchange64(volatile int64 *dest, int64 exch, int64 cmp){
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return __sync_val_compare_and_swap(dest, cmp, exch);
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}//end: InterlockedCompareExchange64()
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static forceinline int32 InterlockedCompareExchange(volatile int32 *dest, int32 exch, int32 cmp){
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return __sync_val_compare_and_swap(dest, cmp, exch);
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}//end: InterlockedCompareExchnage()
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static forceinline int64 InterlockedExchange64(volatile int64 *target, int64 val){
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return __sync_lock_test_and_set(target, val);
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}//end: InterlockedExchange64()
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static forceinline int32 InterlockedExchange(volatile int32 *target, int32 val){
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return __sync_lock_test_and_set(target, val);
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}//end: InterlockedExchange()
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#endif //endif compiler decission
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#endif
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